As shown in FIG. 7, for example, a general liquid crystal display element driving unit, which drives a liquid crystal display element as a matrix electrode structural display element by means of multiplex driving method, is arranged so as to have a display panel 101, where signal electrodes X.sub.1 through X.sub.M and scanning electrodes Y.sub.1 through Y.sub.N are disposed in a matrix-like pattern and liquid crystal display elements are respectively connected to intersection portions of the signal electrodes X.sub.1 through X.sub.M and the scanning electrodes Y.sub.1 through Y.sub.N, a signal electrode driving circuit 102 for driving the signal electrodes X.sub.1 through X.sub.M and a scanning electrode driving circuit 103 for driving the scanning electrodes Y.sub.1 through Y.sub.N.
Signal electrode side liquid crystal driving ICs (Integrated Circuit) 105, which apply a prescribed voltage according to display to the signal electrodes X.sub.1 through X.sub.M, are provided to a signal electrode side substrate 104 of the signal electrode driving circuit 102, and scanning electrode side liquid crystal driving ICs 107, which line-sequentially apply a fixed voltage to the scanning electrodes Y.sub.1 through Y.sub.N are provided to a scanning electrode side substrate 106 of the scanning electrode driving circuit 103. A liquid crystal display element applied voltage, which is voltage difference between liquid crystal driving voltages outputted from the signal electrode side liquid crystal driving ICs 105 and the scanning electrode side liquid crystal driving ICs 107, is applied to each liquid crystal display element of the display panel 101.
In other words, in the signal electrode driving circuit 102, when input signals (LP, SCLK, FR and Data), logical circuit voltages (VCC and GND) and liquid crystal driving voltages (V0, V2, V3 and V5) are inputted from a control section 110 to the signal electrode side liquid crystal driving ICs 105 through the signal electrode side substrate 104 as an external input interface, one of the four kinds of the above liquid crystal driving voltages is applied to the signal electrodes X1 through XM from the signal electrode side liquid crystal driving IC 105.
In addition, in the scanning electrode driving circuit 103, when input signals (FP, LP and FR), logical circuit voltages (VCC and GND) and liquid crystal driving voltages (V0, V1, V4 and V5) are inputted from the control section, not shown, to the scanning electrode side liquid crystal driving ICs 107 through the scanning electrode side substrate 106 as an external input interface, one of the two kinds of the liquid crystal driving voltages for selection in the four kinds of the liquid crystal driving voltages is selectively applied to selected lines of the scanning electrodes Y.sub.1 through Y.sub.N, and one of the two kinds of the liquid crystal driving voltages for non-selection is selectively applied to non-selected lines.
The signal electrode side liquid crystal driving IC 105 has functions, for example, shown in FIG. 3 which is an explanatory drawing of the present invention. In other words, in the signal electrode side liquid crystal driving IC 105, after the inputted Data signal are successively stored from a position according to the right or left end of the display panel 101 at timing shown in FIG. 8, namely, timing that the inputted Data signal is synchronized with the shift clock signal SCLK after the latch pulse signal LP is changed from High level (ie. "H") to Low level (ie. "L"). When the latch pulse signal LP is again changed from "H" to "L", the Data signal stored in the signal electrode side liquid crystal driving IC 105 is latched. Then, the liquid crystal driving voltages are selectively outputted according to the combination of the latched Data signal (ie. latched Data) and the switching signal FR which is an input signal to be inputted to the signal electrode driving circuit 102.
In addition, the scanning electrode side liquid crystal driving IC 107 has functions shown in FIG. 4 which is an explanatory drawing of the present invention, for example. In other words, the scanning electrode side liquid crystal driving IC 107 selectively outputs the liquid crystal driving voltage according to the combination of the switching signal FR to be inputted and the Data signal from the shift register, not shown, provided to the scanning electrode side liquid crystal driving IC 107 (ie. shift register Data). When the frame pulse signal FP to be inputted to the scanning electrode side liquid crystal driving IC 107 is at "H" and the latch pulse signal LP is changed from "H" to "L", only the shift register Data on the first line are at "H" and the shift register Data on the other lines are at "L". Meanwhile, when the frame pulse signal FP is at "L" and the latch pulse signal LP is changed from "H" to "L", in the case where the shift register Data on the (m-1)-numbered line are at "H" before the changing, only the shift register Data on the m-numbered line are at "H" and the shift register Data on the other lines are at "L" after the changing.
The latch pulse signal LP to be inputted to the signal electrode driving circuit 102 is the same as the latch pulse signal LP to be inputted to the scanning electrode driving circuit 103, and the switching signals FR to be inputted to the signal electrode driving circuit 102 is the same as the switching signal FR to be inputted to the scanning electrode driving circuit 103.
The following describes a relationship between a liquid crystal applied voltage waveform observed from one picture element X.sub.j -Y.sub.i in the display panel 101 shown in FIG. 7 and the input signal from the external interface on reference to a timing chart of FIG. 9. Here, the waveforms on the right and left sides of the drawing show examples of two different kinds of waveforms. Moreover, the timing chart of FIG. 8 and the upper timing chart of FIG. 9 are the same.
The drawing shows examples of waveforms of, from the above, an external interface input signal, the latched data which are obtained by latching the external interface inputted signal by the latch pulse signal LP, namely, the X.sub.j line Data. Hereafter, the drawing shows accomplished waveforms of output voltages from the signal electrode side liquid crystal driving IC 105 and the scanning electrode side liquid crystal driving IC 107 according to the above examples of the waveforms and in the case where the line Y.sub.i is selected as the line of the scanning electrode, and a waveform of an applied voltage to the one picture element X.sub.j -Y.sub.i on the display panel 101 (waveform of the matrix electrode structural display element applied voltage) which is the final result of the waveforms of the output voltages.
However, as shown in FIG. 9, according to the waveform of the applied voltage to the one picture element X.sub.j -Y.sub.i on the display panel 101, in the above conventional liquid crystal display element driving unit, a change in the level of the voltage which can be applied to one line during one selecting period is limited to once. The selecting period is a period of time for determining by a level of a voltage to be applied as to whether a liquid crystal display element on a certain line is made in an "ON state" or "OFF state", and the selecting period for one line is obtained such that one frame pulse signal FP period which is a time for displaying one image is divided by a number of latch pulse signals LP during one frame pulse signal FP period (a scanning electrode-side latch pulse signal LPY instead of the latch pulse signal LP in an arrangement of the present invention mentioned later).
Incidentally, in order to switch the level of the voltage, which is changed according to the Data signal, twice or more during one selecting period, it is necessary to arrange the signal electrode side liquid crystal driving IC so that it is capable of changing contents of the latched data, which can be primarily changed only when the latch pulse signal LP is changed from "H" to "L", at arbitrary timing by inputting not only the input control signals (Data signal, etc.) shown in FIG. 7 but also another control signal from the outside.
Therefore, since development of a new driving IC is required, the conventional driving ICs cannot be utilized, and since such development requires time, costs of producing units increase.